rev. 0.1 3/14 copyright ? 2014 by silicon laboratories si80xx-evb si80xx-evb si80 xx t hree to s ix channel d igital i solator e valuation b oard u ser s g uide 1. introduction the si80xx evaluation kit allows designer s to evaluate silicon lab' s family of low-power digi tal isolators. these are cmos devices offering substantial dat a rate, propagation delay, power, size, reliability, and external bom advantages over legacy isolation technologies. the operati ng parameters of these products remain stable across wide temperature ranges and throughout device service life fo r ease of design and highly uniform performance. all device versions have schmitt trigger inputs for high no ise immunity and only require vdd bypass capacitors. data rates up to 10 mbps are supported, and all devices achiev e propagation delays of less than 65 ns. enable inputs provide a single point control for enabling and disabling output drive. ordering option s include a choice of 1kv rms isolation ratings. for more information, refer to the si80xx family data sheets. this evaluation kit consists of an evaluation board featuring the qsop-16 package. note that the other packages are not available at this time. 1.1. kit contents the si80xx evaluation kit contains the following items: ?? si80xx based evaluation board as shown in figures 1. ?? si80xx digital isolator (installed on the evaluation board) ?? SI8065 (qsop-16) figure 1. si80xx evaluation board overview
si80xx-evb 2 rev. 0.1 2. required equipment the following items are required to demonstrate the evaluation board: ?? 1 digital multimeter ?? 2 multimeter test leads (red and black) ?? 1 oscilloscope (tektronix tds 2024b or equivalent) ?? 1 bnc splitter ?? 4 coaxial cables ?? 2 dc power supply (hp6024a, 30 v dc, 0C100 ma or equivalent) ?? 2 bnc to clip converters (red and black) ?? 4 banana to clip wires (2 red and 2 black) ?? 1 function generator (agilent 33220a, 20 mhz or equivalent) ?? si80xx evaluation board (board under test) ?? si80xx digital isolator input evaluati on board user's guide (this document)
si80xx-evb rev. 0.1 3 3. hardware overview and demo figure 2 illustrates the connection di agram used to demonstrat e the si80xx-evb. this de mo transmits a 500 khz (5 v peak, 50 percent duty cycle) square wave through the isolator to its output. in this example, vdd1 and vdd2 are powered by 5 v supplies. figure 3 shows a scope shot of ch1 (input) and ch2 (output). note that if a user wants to evaluate a digital isolator other than the ones pre-populated, this can be accomplished by removing the installed device and replacing it with the desired footprint-compatible isolator device. figure 2. summary diagram and demo setup figure 3. oscilloscope display of input and output signal ? input 500 ? khz, ? 5 ? vpk square ? wave ? signal ? generator ? 5 ? v ? supply ? vdd1 a1 gnd1 vdd2 b1 gnd2 SI8065 evb ? 5 ? v ? supply ? oscilloscope ch1 ch2
si80xx-evb 4 rev. 0.1 3.1. dc supply configuration to run the demo, follow the inst ructions below. review figure 2 and figure 5 if necessary. 1. turn off the dc power supply and ensure that the output voltage is set to its lowest output voltage. 2. connect the banana ends of the black and red bana na-to-clip terminated wires to the outputs of both dc supplies. 3. for the input side of the si80 xx-evb, connect the clip end of the red banana-to-clip te rminated wire to vdd1 and the clip end of the black wire to gnd1. 4. similarly, for the output side of the evb, the red wire goes to vd d2 and the black wire goes to gnd2. 5. turn on the dc power supply and adjust both dc power supplies to provide 5 v on their outputs. 6. ensure that the current draw is less than 25 ma. if it is larger, this indicates that either the board or si80xx has been damaged or the supply is connected backwards. 3.2. wave form generator 1. turn on the arbitrary waveform generator with the output disengaged. 2. adjust its output to provide a 500 khz, 0 to 5 v peak square wave (50 percen t duty cycle) to its output. 3. connect one end of the first coaxial ca ble to the output of the signal generator. 4. connect the bnc splitter to the other end of the first coaxial cable. 5. from the bnc splitter, connect the second coaxial cable to ch1 of the scope. ch1 will di splay the input to the evb. 6. connect the third coaxial cable to the bnc splitter, and connect a bnc-to-clip converter to the end of this coaxial cable. 7. from here, connect the clip end of the bnc-to-clip conver ter to the si80xx-evbs a1 (red wire here) and gnd1 (black wire here). 8. connect one end of the fourth coaxial cable to a bnc-to-clip converter (note that a scope probe can be used here instead). 9. from here, connect the clip end of the bnc-to-clip conver ter to the si80xx-evbs b1 (red wire here) and gnd2 (black wire here). 10. connect the other end of the fo urth coaxial cable to ch2 of the oscilloscope. ch2 will display the output of the evb. 11. engage the output of the waveform generator. 3.3. oscilloscope setup 1. turn on the oscilloscope. 2. set the scope to trigger on ch1 and adjust the trigger level to 1 v minimum. 3. set ch1and ch2 to 2 v per division. 4. adjust the seconds/divis ion setting to 400 ns/division. 5. adjust the level indicator for all channels to properly view each channel as shown in figure 3. a 500 khz square wave should display on channel 1 of th e scope for the input and a 5 v delayed version of this square wave should display the output on channel 2, as shown in figure 3. this concludes the basic demo.
si80xx-evb rev. 0.1 5 4. hardware and overview setup the board is designed to be powered from two separate supplies vdd1, vdd2 that can be independently varied from 3.15 to 5.5 v. figure 4 shows a silkscreen overvi ew of the board and figure 5 shows the board schematic. the power and jumper connection descriptions are summarized here: ?? j1/3/5 stake headers used to power and conne ct to the digital isolators side1 pins. ?? j2/4/6 stake headers used to power and connect to the digital isolators side 2 pins. ?? tp1/2/3/4 test points that can also be used to provide vdd and gnd. figure 4. si80xx dip8 evaluation board silkscreen
si80xx-evb 6 rev. 0.1 5. si80xx evaluation board schematics figure 5. si80xx evaluation board schematic dc_vdd1 dc_vdd1 dc_vdd1 dc_vdd2 dc_vdd2 dc_vdd2 c11 0.1uf j3 header 1x8 1 2 3 4 5 6 7 8 c3 0.1uf c12 1uf u2 soic16nb 1 1 2 2 4 4 7 7 5 5 10 10 8 8 9 9 12 12 11 11 3 3 6 6 13 13 14 14 15 15 16 16 j6 header 1x8 1 2 3 4 5 6 7 8 u3 qsop16 1 1 2 2 4 4 7 7 5 5 10 10 8 8 9 9 12 12 11 11 3 3 6 6 13 13 14 14 15 15 16 16 c8 1uf j2 header 1x8 1 2 3 4 5 6 7 8 tp1 c9 1uf c7 0.1uf sf3 sf2 tp4 j4 header 1x8 1 2 3 4 5 6 7 8 sf1 j1 header 1x8 1 2 3 4 5 6 7 8 c10 0.1uf c1 1uf sf4 tp3 tp2 c5 1uf c2 0.1uf c4 1uf u1 soic16wb 1 1 2 2 4 4 7 7 5 5 10 10 8 8 9 9 12 12 11 11 3 3 6 6 13 13 14 14 15 15 16 16 c6 0.1uf j5 header 1x8 1 2 3 4 5 6 7 8
si80xx-evb rev. 0.1 7 6. bill of materials table 1. si80xx evaluation board bill of materials item qty ref part # supplier description value 1 6 c1, c4, c5, c8, c9, c12 c0603x5r250-105k venkel cap, 1 f, 25 v, 10%, x5r, 0603 1f 2 6 c2, c3, c6, c7, c10, c11 c0805x7r101-104k venkel cap, 0.1 f, 100 v, 10%, x7r, 0805 0.1 f 3 6 j1, j2, j3, j4, j5, j6 tsw-108-07-t-s samtec heade r, 1x8, 0.1in pitch, tin plated header 1x8 4 4 sf1, sf2, sf3, sf4 sj61a6 3m hdw, bumpon cylindrical 312x.215 blk bumper 5 4 tp1, tp2, tp3, tp4 151-201-rc kobiconn testpoint, white, pth white 6 1 u1 SI8065ad-b-is (not installed) silicon labs ic, three to six-channel digital isolators, soic16wb soic16wb 7 1 u2 SI8065ac-b-is1 (not installed) silicon labs ic, three to six-channel digital isolators, soic16nb soic16nb 8 1 u3 SI8065aa-b-iu silicon labs ic, isolator, 6 i/o, qsop16 qsop16
si80xx-evb 8 rev. 0.1 7. ordering guide table 2. si80xx evaluation board ordering guide ordering part number (opn) description si80xx-kit si80xx isolator evaluation board kit
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